Quick Revision Notes

Class 12 Physics - Semiconductor Electronics: Materials, Devices and Simple Circuits

MP Board

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1. Classification of Metals, Conductors, and Semiconductors

Based on energy bands (Band Theory of Solids), materials are classified into three categories:

• Valence Band (VB): The energy band containing valence electrons. It is completely or partially filled with electrons at absolute zero.
• Conduction Band (CB): The energy band above the valence band. Electrons in this band are free to move under an electric field, constituting electric current.
• Energy Band Gap ($E_g$): The energy gap between the valence band and the conduction band.

Differences:

Property	Metals (Conductors)	Insulators	Semiconductors
Band Gap ($E_g$)	$E_g = 0$ (Overlap)	Large ($E_g > 3 \text{ eV}$)	Small ($E_g \approx 1 \text{ eV}$)
Electrical Conductivity	Very High ($\sigma > 10^2 \text{ S/m}$)	Very Low ($\sigma < 10^{-10} \text{ S/m}$)	Moderate ($10^{-5}$ to $10^6 \text{ S/m}$)
Temperature Coefficient ($\alpha$)	Positive ($\alpha > 0$)	Negative ($\alpha < 0$)	Negative ($\alpha < 0$)

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2. Intrinsic and Extrinsic Semiconductors

• Intrinsic Semiconductor: Pure semiconductor (e.g., Germanium, Silicon) with no impurities.
  • In pure semiconductors, number of free electrons ($n_e$) equals number of holes ($n_h$): n_e = n_h = n_i (where $n_i$ is the intrinsic carrier concentration).
• Extrinsic Semiconductor: Semiconductors doped with a small amount of suitable impurity to increase conductivity.
  • $n$-type Semiconductor: Formed by doping a pure semiconductor with a pentavalent impurity (e.g., Phosphorus, Arsenic).
    • Majority charge carriers: Electrons ($n_e >> n_h$)
    • Minority charge carriers: Holes
  • $p$-type Semiconductor: Formed by doping with a trivalent impurity (e.g., Boron, Indium).
    • Majority charge carriers: Holes ($n_h >> n_e$)
    • Minority charge carriers: Electrons

Mass-Action Law:

In thermal equilibrium, the product of free electron concentration ($n_e$) and hole concentration ($n_h$) is constant for a given semiconductor at a given temperature. n_e * n_h = n_i^2

Total Electrical Conductivity ($\sigma$): sigma = e * (n_e * mu_e + n_h * mu_h) (where $\mu_e$ and $\mu_h$ are mobilities of electrons and holes, respectively, and $e$ is electronic charge).

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3. $p$-$n$ Junction Diode

A $p$-$n$ junction is formed when a $p$-type semiconductor is joined to an $n$-type semiconductor.

• Depletion Region: The space-charge region on either side of the junction devoid of free charge carriers (due to diffusion and recombination of electrons and holes).
• Potential Barrier ($V_b$): The potential difference across the depletion region that opposes further movement of charge carriers.

Biasing of $p$-$n$ Junction:

1. Forward Biasing: $p$-side is connected to the positive terminal and $n$-side to the negative terminal of a battery.
   • Depletion layer width decreases.
   • Resistance is low.
   • Large current flows easily.
2. Reverse Biasing: $p$-side is connected to the negative terminal and $n$-side to the positive terminal.
   • Depletion layer width increases.
   • Resistance is very high.
   • Only a tiny reverse saturation current flows.

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4. Special Purpose $p$-$n$ Junction Diodes

• Zener Diode:
  • Heavily doped $p$-$n$ junction designed to operate in the reverse breakdown region.
  • Used as a Voltage Regulator to maintain a constant output voltage across a load despite variations in input voltage or load current.
• Optoelectronic Junction Devices:
  1. Photodiodes: Operated in reverse bias to detect optical signals (light). Current changes with light intensity.
  2. Light Emitting Diode (LED): Forward-biased $p$-$n$ junction that spontaneously converts electrical energy into light.
  3. Solar Cell: Photodiode that converts solar energy into electrical energy (without external bias).

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5. Junction Transistor

A three-terminal semiconductor device formed by sandwiching a thin layer of one type of semiconductor between two thick layers of the other type.

• Three Regions:

  1. Emitter (E): Heavily doped, emits charge carriers.
  2. Base (B): Very thin and lightly doped, passes carriers from emitter to collector.
  3. Collector (C): Moderately doped and larger in size, collects charge carriers.

• Types: $n-p-n$ transistor and $p-n-p$ transistor.

Current Relations:

I_E = I_B + I_C (where $I_E$ = Emitter current, $I_B$ = Base current, $I_C$ = Collector current)

Transistor Action Parameters (Common Emitter Configuration):

• Current Amplification Factor ($\beta$): beta = Delta I_C / Delta I_B
• Current Gain ($\alpha$) in Common Base: alpha = Delta I_C / Delta I_E
• Relation between $\alpha$ and $\beta$: beta = alpha / (1 - alpha) or alpha = beta / (1 + beta)

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6. Digital Electronics and Logic Gates

Digital circuits process signals that have only two discrete values (binary 0 and 1).

Basic Logic Gates:

1. NOT Gate (Inverter):

   • Operation: Inverts the input.
   • Boolean Expression: Y = NOT(A) or Y = A'
   • Truth Table:
     • If $A = 0$, $Y = 1$
     • If $A = 1$, $Y = 0$

2. OR Gate:

   • Operation: Output is 1 if any input is 1.
   • Boolean Expression: Y = A + B
   • Truth Table: $(0,0 \to 0)$, $(0,1 \to 1)$, $(1,0 \to 1)$, $(1,1 \to 1)$

3. AND Gate:

   • Operation: Output is 1 only if all inputs are 1.
   • Boolean Expression: Y = A . B
   • Truth Table: $(0,0 \to 0)$, $(0,1 \to 0)$, $(1,0 \to 0)$, $(1,1 \to 1)$

4. NOR Gate (OR + NOT):

   • Boolean Expression: Y = NOT(A + B)
   • Truth Table: $(0,0 \to 1)$, $(0,1 \to 0)$, $(1,0 \to 0)$, $(1,1 \to 0)$

5. NAND Gate (AND + NOT):

   • Boolean Expression: Y = NOT(A . B)
   • Truth Table: $(0,0 \to 1)$, $(0,1 \to 1)$, $(1,0 \to 1)$, $(1,1 \to 0)$
   • Note: NAND and NOR gates are called Universal Gates because any logic function can be implemented using them.